Main expected outcomes:
An inventory was made of the methods and
equipment available in the consortium for measuring and analyzing (i) TCO
properties and (ii) their functioning and/or effect on device level (for each
targeted project application). The results were used to devise a protocol for a
direct and fair comparison of the opto-electrical properties of the various
TCOs prepared by the different partners, in which a central partner provides
reference TCO samples to other partners for the calibration of their
measurements.
The minimum required TCO properties, along with possible process limitations dictated by the specific applications were compared with the already available In-free TCOs within the project consortium.
A review and evaluation of the set of electrode and deposition process requirements was made in 2016. The updated set of requirements and specifications of TCO films has been sent as an output to WP3 and WP5 for validation on end user devices.
WP2 "Modelling and structural-property correlation of In-free TCOs"Task 2.1 “Materials Design &
Optimisation from First-Principles” is focused on theory and simulation. A new first-principles quantum mechanical approach was applied and
tested for ZnO, SnO2 and related materials. This approach reduced uncertainty
in electron exchange and correlation to increase the predictive power of such
numerical simulations.
Task 2.2 "Microstructural characterisation of the thin films" focused on advanced experimental characterisation, which includes the microstructure of ZnO:Al, SnO2 as well as interfaces relevant to device applications, including Si / ZnO:Al / Ag.
In-free TCO thin films were prepared by
different deposition methods using ranges of deposition parameters for detailed
analysis of their intrinsic properties in WP2 and to provide the basis for optimum materials
selection for the application activities in WP5.
High performance alternatives to ITO were synthesized by means of gas phase and wet chemistry-based approaches for lab scale demonstration in the targeted applications: PV c-Si HJT, lighting (OLED and inorganic LEDs) and touch-screens.
Needed advances in deposition technologies and tools were made for high layer uniformity in large area conditions, and for improved control on the damage induced by plasma processes.
A new photolithography mask set has been designed and is now being used to for assessing contact resistance and sheet resistivity of various TCOs deposited on materials relevant to the stated applications.
WP4 "Selection, Life Cycle Analysis (LCA) screening of new TCOs on selected devices"After extensive literature screening and
consultations with LCA software providers, the most suitable technology
methodology for life cycle assessment (LCA) of TCO’s layer deposition process
was selected. SimaPro® methodology, which allows easy modelling and analyzing
of complex life cycles in a systematic and transparent way, has been chosen as a
basic tool for LCA analysis in INREP. Subsequently, process of data
acquisition for the inventory analysis was organized. Data collection forms
were prepared and sent among involved partners. Based on collected data, the process of data
treatment for the LCA calculations was launched. The inventory analysis of
different TCOs is in progress.
Good progress has been made in depositing ITO replacement layers in both solar cells and LEDs. The intial trials of new oxides have been completed by depositing the layers onto n faced n-GaN and measuring their resistivity and contact resistance to the GaN. AZO layers from two partners were provided along with ZnO from a third. Experimental measurements showed that one layer in particular gave an ohmic contact while the others exhibited non-ohmic behavior. This result led to further experiments being carried out to explore optimisation around the conditions used on the best performing layer, which was a ZnO variant. At the same time, a process flow and mask set have been generated to incorporate these new layers into a GaN based LED. This will provide a LED structure which can be used to test the performance in practice. The manufacturing steps to form the base layers for the LED have begun. It is well known that a plane surface has a poor emittance of light from an LED layer due to total internal reflection. One common solution to this limitation is to pattern the surface of the LED. It was demonstrated last year in the early trials that the new TCOs could be deposited on such a surface (e.g. nanorod coating) and the LED process will enable a comparison between TCOs deposited on planar and patterned surfaces to maximise the light extraction. The goal is to combine a low resistance with high light extraction.
Progress on touch-screens has been made with a first set of test structures built to determine what options should be followed to the next stage. Alternatives for single (self- capacitance) and dual structures (mutual capacitance) have been considered. Work is progressing on the mutual capacitance option but both routes will continue to be explored to find the optimum results.